This invention relates to a pulse detecting circuit of a receiver utilized in a digital radio communication system such as a mobile radio system or the likes.
In such a digital radio communication system as disclosed in U.S. Pat. No. 4,194,153 assigned to the same assignee as the present application, for the purpose of decreasing current consumption, the so-called battery saving system is generally used in which a power source of the receiver, for example, a personal radio paging receiver is periodically interrupted. As disclosed in U.S. patent application Ser. No. 240,873 filed Mar. 5, 1981, now U.S. Pat. No. 4,353,065 and assigned to the same assignee as the present application, the pulse detecting circuit utilized in the receiver comprises an integrating circuit for integrating an input signal and having two types of time constants, long and short, and a detecting circuit for detecting the input signal by utilizing the output of the integrating circuit as a reference voltage. In such a detecting circuit, at the time of closing a source switch, the integrating circuit is set up for the shorter time constant to shorten a time for establishment of the reference voltage in advance of the reception of the input signal, while at the time of receiving the input signal, the integrating circuit is set up for the longer time constant to alleviate the influence caused by the fluctuation in the DC level. However, as will be detailed later with reference to the drawings, even in such a pulse detecting circuit, accurate detecting operation and sufficient power saving of the receiver as a whole can not be assured dependent on the construction or format of the selectively received signal and the battery saving timing.